Buses are used to interconnect components and elements of digital computing systems. A bus is a collection of wires in a cable or conductive traces on a printed circuit board which transmit data, status, and control signals, and to supply operating power and ground return paths. A bus between physically separate computing systems is frequently referred to as a network.
Standard buses and bus structures have become widespread in digital computing. One family of bus structures is known as Small Computer System Interface, or "SCSI". The SCSI bus structure has become standardized, as specified by document S3.131-1986 published by the American National Standards Institute in June, 1986. This bus enabled eight computer CPUs and peripherals to be interconnected, and provided a defined physical interconnect and a signaling construct enabling exchange of data between interconnecting computing/storage subsystems, etc.
One recent improvement to SCSI has been the low voltage differential (LVD) bus structure. In differential mode information is sent simultaneously through a pair of wires. The information is interpreted as the difference in voltage between the two wires. External noise affects the signal on the wires equally and the difference in noise voltage is zero. The wires are frequently twisted together which provides desired noise cancellation. Accordingly, the LVD bus may extend over a greater distance than a single-ended bus. A first logical condition (such as "true") is present when the voltage on one wire exceeds the voltage on the other wire of the LVD bus pair. When the voltages are reversed, a second logical condition (such as "false") is present. The LVD bus pair has a specified differential signaling range of approximately 400 millivolts, e.g. 1.1 volts to 1.5 volts. That is to say, voltages on the pair of wires of 1.5 volts/1.1 volts would be interpreted as a logical high or true level whereas voltages on the same pair of wires of 1.1 volts/1.5 volts would be interpreted as a logical low or false level. The specified signaling range is 0.5 volts to 2.0 volts, with a 400 millivolts differential. Thus, voltage differences of 0.9 volts/0.5 volts, and 1.9 volts/1.4 volts would result in a logical high level, and if reversed, a logical low level, on the LVD bus pair.
FIG. 1 shows a conventional digital differential bus structure 10 which implements a bus standard or convention, such as LVD SCSI, for example. The bus 10 includes a positive line 12 and a negative line 14. When the positive line 12 is driven high or true (and the negative line 14 is driven low or false) a digital value is being asserted (true). On the other hand, when the positive line 12 is driven low or false (and the negative line 14 is driven high or true), the digital signaling condition is negated (false). The bus 10 is terminated at each end by a terminator 16 which matches the characteristic differential impedance of the bus. A bias generator 18 applies a weak negation bias to the differential bus 10, such as e.g. -2.1 milliamperes which forces the bus 10 to a known logical state (negation) during bus idle mode, for example. The positive line 12 is driven negative with respect to the negative line 14 by the weak negation bias.
A number of users (drops) may be connected to the bus 10. Four users 1, 2, 3 and 4 are shown connected to bus 10 in FIG. 1, although a greater number or lesser number of users may be attached (the minimum number of users being two). In the LVD SCSI specification up to 16 users may be connected. The four users shown in FIG. 1 include output integrated circuit (IC) drivers 20, 22, 24 and 26. Each one of the drivers 20, 22, 24 and 26 is typically part of a very large scale integrated circuit (VLSI) bus interface chip, and is therefore subject to voltage, temperature and manufacturing tolerances, which have proven to be problematic, particularly with the relatively low signaling bandwidth of LVD SCSI. (Those skilled in the art will appreciate that FIG. 1 omits data receivers which are connected to receive data from the bus 10, as the present invention relates to improvements in IC drivers; in practice, receivers would be present in each user interface circuit chip).
The specification for LVD SCSI calls for operation in two disparate modes, a "push-pull" mode and a "wired-OR" mode. In push-pull mode the driver is required to force both directions of logical change of bus state with comparable signal amplitudes. In wired-OR mode only one direction of logical change is driven by the IC driver, and the other transition is forced by the weak bias generator 18 which returns the bus to its default (idle) state. Push-pull is used for high speed data transfers, while wired-OR is used for low speed transfers. One problem lies in providing a single IC driver circuit which provides optimal wave shapes in both push-pull and wired-OR operational modes. The prior approach has been to compromise with non-optimal wave forms for each transition. This compromise is made at the time the IC chip is designed and built, and cannot be altered later. Therefore, a hitherto unsolved need has arisen for a method and apparatus for generating multiple variable edge rates for the driver.
An asymmetrical current mode driver is used for high speed synchronous data transfers over a transmission path such as LVD SCSI. For signal assertion (logical true condition) a differential current of about nine milliamperes is driven, and for active negation, a current of about minus four and one half milliamperes is driven. This difference in driving current between assertion and negation is necessary to counteract the weak negation bias applied to the bus 10 by the negation bias generator 18. The act of turning on and off half of the driver causes undesirable transients because of parasitic capacitance associated with the current source. These capacitances store charge which comes into play when the current source is connected to, and disconnected from, the bus. The signal transmitted to the bus may have a leading edge overshoot as great as fifty percent above the nominal signal amplitude. One prior approach for solving this problem was to substitute a dummy load for the transmission line during times in which the signal is not being driven onto the line. However, this prior approach adds complexity and results in consumption of considerably more power than desirable, leading to IC chip heating and thermal tolerance variations, as well as additional power supply requirements. Therefore, a hitherto further unsolved need has remained for an IC driver chip which provides for smooth ramping of a current source which is switched onto a transmission line.